1. Field of the Invention
The present invention relates to a method for processing a wafer and an apparatus for performing the same. The present invention further relates to a method for etching a wafer and an apparatus for performing the same. More particularly, the present invention relates to a method for processing a material, such as a native oxide layer, formed on a wafer and a method for etching the material.
2. Description of the Related Art
Recently, the design of semiconductor devices has made rapid progress for wide spread use in information media applications such as computers. In particular, this progress has required the semiconductor devices to function at a high operating speed and to have a large storage capacitance. In order to satisfy these requirements, semiconductor devices having an increased density, higher reliability, and a faster response time are under continued development.
The continuous development of manufacturing techniques of a DRAM device has achieved a mass-production of a 256 Mega bit DRAM device and a Giga bit DRAM device. The 256 Mega bit DRAM device and the Giga bit DRAM device include a multi-layered wiring structure.
A multi-layered wiring structure is obtained by sequentially depositing each layer of the multi-layered wiring structure. During the implementation of the stacking process of each layer, the wafer is frequently exposed to the atmosphere. When the wafer is exposed to the atmosphere, silicon present on the wafer reacts with O2 in the atmosphere to form a native oxide layer.
FIG. 1 illustrates a wafer 10 on which a native oxide layer 12 is grown. When the wafer 10 makes contact with O2 in the atmosphere, Si composing the wafer 10 reacts with O2 to grow the native oxide layer 12 as shown in FIG. 1. This native oxide layer 12 is grown to a thickness of about several Å on the wafer 10.
The native oxide layer is a factor in inducing a defect during subsequently implemented integrated circuit (IC) processes. It also becomes a cause of increasing contact resistance, which leads to a lowering of an operation speed and the reliability of a semiconductor device.
FIG. 2 is a cross-sectional view of a wafer 20 having a contact hole 26 and a native oxide layer 22 grown thereon. That is, the native oxide layer 22 is grown through a reaction of silicon with oxygen in the atmosphere at the bottom portion of a contact hole 26 that is formed through a patterning process of an insulating layer 24. Since the native oxide layer leads to an increase in contact resistance, preferably, the native oxide layer is removed.
According to a conventional method for removing the native oxide layer, the native oxide layer is etched by a wet etching method. However, for a contact hole having a high aspect ratio, the etching of the native oxide layer by the wet etching method is not easy. In addition, other structures integrated on the wafer may also be affected by the wet etching method due to some of the chemicals used in the wet etching method.
According to another conventional method for removing the native oxide layer, the native oxide layer is etched by a dry etching method. That is, the native oxide layer is etched using an etching gas. Accordingly, the native oxide in a contact hole having a high aspect ratio can be advantageously etched off. In addition, the etching gas has less effect on the other structures integrated on the wafer as compared to the chemicals used in the wet etching method. Since the wafer is processed through a single wafer-type treatment method according to the dry etching method, however, the processing efficiency of the etching of the native oxide layer is very low.
Recently, a pre-treating method, which is implemented after formation of a thin native oxide film on the wafer and before a subsequent process for restraining the growth of the native oxide layer, has been reported. That is, the pre-treating method for restraining the growth of the native oxide layer is implemented within a same space (for example, a chamber) used for forming the thin film before carrying out the subsequent process.
According to a conventional pre-treating method, a thin film is formed on a wafer and then a heat treatment and a cooling are subsequently implemented to restrain the growth of the native oxide layer on the thin film within the same space used for forming the thin film. According to another conventional pre-treating method, a chamber including a cooling unit and a heater therein for forming a thin film is disclosed. The growth of the native oxide layer can be restrained by subsequently implementing a heat treatment and a cooling within the same chamber after forming the thin film on the wafer.
The growth of the native oxide layer, however, cannot be completely restrained through implementing the pre-treating process steps. When the thin film makes contact with O2 in the atmosphere, the growth of the native oxide layer is inevitable. In addition, according to the conventional methods described above, all of the elements for carrying out the pre-treatment are installed within the same chamber used for forming the thin film. However, the chamber has a spatial limitation and so the manufacturing cost of the chamber increases.
Therefore, a novel method for improving the productivity of the wafer treatment step with a minimization in the spatial restriction is required.